1. Field of the Invention
The present invention relates to a semiconductor wiring assembly, a semiconductor composite wiring assembly, and a resin-sealed semiconductor device. The invention relates particularly to a semiconductor wiring assembly, a semiconductor composite wiring assembly, and a resin-sealed semiconductor device that allow for reliable mounting of a smaller semiconductor chip (larger-scale integration chip) than conventional ones and contribute to manufacturing cost reduction.
2. Description of the Related Art
Recent progress in large-scale integration and miniaturization technologies, coupled with the current trend toward highly-functionalized, small electronic devices, has led to even larger-scale integration and further functionalization of semiconductor devices. The number of terminals (pins) used in such semiconductor devices is thus being required to be increased.
An example of such a semiconductor device is a semiconductor package which is formed by mounting a semiconductor chip such as an IC chip and a LSI chip on a lead frame and sealing them with insulating resin. With the progress in large-scale integration and miniaturization, such a package structure has shifted toward thinner and smaller structures, that is, from SOJ (Small Outline J-leaded) packages and QF (Quad Flat) packages, in which external leads protrude from the side walls of a resin package, toward QFN (Quad Flat Non-leaded) packages and SON (Small Outline Non-leaded) packages, in which external leads are embedded on the bottom surface of a resin package without protruding from its side walls.
Another currently used package type is BGA (Ball Grid Array) packages (surface-mount packages), which were designed to overcome problems associated with QF-package mounting. In a BGA package, solder balls are used as the outer terminals of the package. LGA (Land Grid Array) packages are also in use today. In a LGA package, which is also a surface-mount package, flat electrodes arranged in the form of a matrix are used as the outer terminals of the package in place of solder balls.
Conventional semiconductor devices are disclosed, for example, in Japanese Patent No. 2688099 and JP-A-10-41434.